ESP32-H21-MINI-1 Pinout, Interfaces and Hardware Design Guide

ESP32-H21-MINI-1 pinout and hardware design guide covering GPIO0-18, ADC, low-power GPIO, USB Serial/JTAG, BLE, Thread/Zigbee, flash restrictions, strapping pins, antenna placement and ESP-IDF support.

ESP32-H21-MINI-1 is Espressif’s compact module for Bluetooth LE and IEEE 802.15.4 applications where Wi-Fi is not required. It combines a 96 MHz single-core RISC-V processor, 320 KB SRAM, 4 MB flash, Bluetooth LE and the 802.15.4 radio needed for Thread and Zigbee in a 13.2 × 16.6 mm module with an onboard PCB antenna.

The key point is that H21 is not a smaller ESP32-C6. It has no Wi-Fi. It is designed for low-power BLE/802.15.4 endpoints and for systems where another ESP or host processor supplies Wi-Fi/Ethernet connectivity when required.

ESP32-H21 is also a relatively new platform in 2026. Espressif’s May 2026 support page originally described H21 support as preview-only on ESP-IDF master, while current ESP-IDF 6.1 documentation now contains H21-specific GPIO, USB and debugging pages. Some getting-started pages still carry “not updated” warnings, so production designs should verify the latest module datasheet, footprint and ESP-IDF release before freezing hardware.

ESP32-H21-MINI-1 Specifications

FeatureESP32-H21-MINI-1
Integrated SoCESP32-H21HF4
CPUSingle-core 32-bit RISC-V
Maximum CPU clock96 MHz
HP SRAM320 KB
ROM128 KB
LP memory4 KB
Flash4 MB
PSRAMNone
Wi-FiNo
BluetoothBluetooth Low Energy
802.15.4Yes — Thread/Zigbee platform
Module GPIO count19 programmable GPIOs
ADC5 channels
USBFull-speed USB Serial/JTAG; no USB OTG
UART2 controllers
I²C2 controllers
SPI2 application/peripheral controllers listed by current framework docs
I²SYes
Module size13.2 × 16.6 × 2.4 mm
AntennaOnboard PCB antenna

Espressif also highlights an integrated on-chip DC-DC converter to reduce active power consumption, which is consistent with H21’s intended low-power sensor/network role.

The Most Important Difference: ESP32-H21 Has No Wi-Fi

ESP32-H21 supports:

Bluetooth LE
IEEE 802.15.4
Thread
Zigbee

It does not contain a Wi-Fi radio.

That makes it appropriate for:

  • Thread end devices.
  • Zigbee sensors and actuators.
  • BLE peripherals and beacons.
  • Low-power Matter-over-Thread endpoints.
  • Radio coprocessor designs paired with a Wi-Fi/Ethernet host.

Espressif specifically describes H21 as suitable for Thread end devices and for Thread Border Router/Matter bridge solutions when combined with an ESP Wi-Fi SoC. A standalone H21 cannot create a Wi-Fi-backed border router because it has no Wi-Fi interface of its own.

For a broader selection guide, see our Best ESP32 for Matter, Thread & Zigbee.

ESP32-H21-MINI-1 Functional Pinout

Current ESP-IDF documentation says the H21 silicon has GPIO0 through GPIO25. GPIO19–25 are normally used by the SPI0/1 flash interface and are not recommended for application use.

Espressif’s module selector lists the ESP32-H21-MINI-1 as exposing 19 programmable GPIOs. Combined with the H21 GPIO map, this indicates that the practical application GPIO set on the 4 MB HF4 MINI-1 is GPIO0–GPIO18.

Important: this GPIO0–18 module mapping is derived from Espressif’s current module-selector GPIO count and the H21 flash-pin map. At the time of writing, the dedicated MINI-1 module datasheet/physical pad-number table is not exposed as clearly as mature modules such as H2/C6. Verify the latest official module datasheet and land pattern before releasing a production PCB.

GPIOSpecial functionDesign note
GPIO0GPIO / optional external JTAG TMSGeneral use when USB JTAG is retained
GPIO1ADC1_CH0 / optional JTAG TDOGood analogue/general GPIO
GPIO2ADC1_CH1 / optional JTAG TCKGood analogue/general GPIO
GPIO3ADC1_CH2 / optional JTAG TDIGood analogue/general GPIO
GPIO4ADC1_CH3Good analogue/general GPIO
GPIO5ADC1_CH4, LP_GPIO0ADC + low-power wake/control capability
GPIO6LP_GPIO1Low-power GPIO capable
GPIO7LP_GPIO2Low-power GPIO capable
GPIO8LP_GPIO3, strapping pinAvoid strong external pull during reset
GPIO9LP_GPIO4Low-power GPIO capable
GPIO10LP_GPIO5Low-power GPIO capable
GPIO11LP_GPIO6Low-power GPIO capable
GPIO12General GPIONormal application I/O
GPIO13Strapping pinAvoid strong external pull during reset
GPIO14Strapping pinAvoid strong external pull during reset
GPIO15General GPIONormal application I/O
GPIO16General GPIONormal application I/O
GPIO17USB D− / USB Serial-JTAGKeep for USB if USB programming/debug is required
GPIO18USB D+ / USB Serial-JTAGKeep for USB if USB programming/debug is required

GPIO19–25 Are Flash Pins, Not Free GPIO

The H21 chip documentation lists GPIO19 through GPIO25 as SPI0/1 pins normally used for the external/in-package flash interface.

Do not design peripherals onto these pins just because the SoC GPIO list reaches GPIO25.

GPIO0–18  → practical application GPIO range on MINI-1
GPIO19–25 → SPI flash interface; do not use as normal application GPIO

This is also why the bare H21 chip is described as having 26 physical GPIOs while the H21-MINI-1 product table lists 19 programmable GPIOs.

ADC Pins

ESP32-H21 has one ADC unit with five channels:

GPIO1 = ADC1_CH0
GPIO2 = ADC1_CH1
GPIO3 = ADC1_CH2
GPIO4 = ADC1_CH3
GPIO5 = ADC1_CH4

For an analogue battery monitor, potentiometer or sensor input, GPIO1–5 are the only H21 ADC choices documented by current ESP-IDF.

GPIO5 is also LP_GPIO0, so it can be useful when a design needs both analogue measurement and low-power-domain capability.

Low-Power GPIO

GPIO5 through GPIO11 map to the H21 low-power GPIO domain:

GPIO5  = LP_GPIO0
GPIO6  = LP_GPIO1
GPIO7  = LP_GPIO2
GPIO8  = LP_GPIO3
GPIO9  = LP_GPIO4
GPIO10 = LP_GPIO5
GPIO11 = LP_GPIO6

This group is particularly interesting for battery-powered Thread/Zigbee sensors where wake inputs or simple low-power control must remain available while the main CPU is sleeping.

Remember that GPIO8 is also a strapping pin, so GPIO5–7 and GPIO9–11 are less awkward first choices for low-power external signals.

Strapping Pins: GPIO8, GPIO13 and GPIO14

Current H21 GPIO documentation identifies three strapping pins:

GPIO8
GPIO13
GPIO14

Strapping pins are sampled during reset to determine startup configuration and then become ordinary GPIOs after boot.

The safe hardware-design rule is:

  • Do not add strong pull-ups/pull-downs unless the official boot table calls for them.
  • Avoid large capacitors that delay the strap voltage during reset.
  • Make attached peripheral outputs high-impedance during startup.
  • Prefer non-strapping GPIOs for relay gates, enable pins or peripherals with unknown power-up states.

GPIO8 has an additional role in JTAG selection if the relevant eFuse is enabled, so it is particularly worth keeping simple during early hardware development.

USB Serial/JTAG: GPIO17 and GPIO18

H21 includes a full-speed USB Serial/JTAG controller. The fixed USB pins are:

GPIO17 = USB D-
GPIO18 = USB D+

This gives a custom H21 board direct USB flashing, serial console and JTAG debugging without a CP2102/CH340/FTDI bridge.

Espressif’s current H21 documentation confirms that USB Serial/JTAG can provide:

  • Bidirectional serial console.
  • Firmware flashing through esptool/ESP-IDF.
  • JTAG debugging through OpenOCD.

If GPIO17/18 are reconfigured as ordinary GPIOs, USB Serial/JTAG is disabled for that firmware configuration.

H21 Does Not Have USB OTG

This is an important difference from ESP32-S3 and H4.

ESP32-H21 provides USB Serial/JTAG peripheral mode, but current framework documentation lists no USB OTG controller.

Use H21 USB for:

  • Programming.
  • Console.
  • Debugging.

Do not choose H21 for a project whose requirement is to emulate an arbitrary USB HID keyboard, USB MIDI interface or custom USB device class. ESP32-S3/H4-class hardware is a better direction for that.

External JTAG Is Optional

By default, H21 routes JTAG through the built-in USB Serial/JTAG block, so the traditional JTAG GPIOs remain available for application use.

If you intentionally switch JTAG to physical pins through eFuse configuration, current stable documentation maps:

GPIO0 = TMS
GPIO1 = TDO
GPIO2 = TCK
GPIO3 = TDI

This switch is a production/security decision, not something to burn casually. Espressif also warns that secure boot/flash-encryption settings can permanently disable JTAG depending on configuration.

UART, I²C, SPI and I²S Are Flexibly Routed

Like other modern ESP chips, H21 uses the GPIO matrix so many peripheral signals can be routed to different GPIOs rather than being locked to one Arduino-style pinout.

Current platform documentation lists:

  • 2 UART controllers.
  • 2 I²C controllers.
  • SPI capability.
  • I²S.
  • Remote Control peripheral.
  • LED PWM.
  • GDMA.
  • MCPWM.

For a custom board, choose peripheral GPIOs from the cleanest non-strapping, non-USB pins rather than copying the default pin assignment from an unrelated DevKit.

A Sensible First GPIO Allocation

FunctionSuggested starting GPIOReason
I²C SDAGPIO6Non-strap, LP capable
I²C SCLGPIO7Non-strap, LP capable
UART TXGPIO15General GPIO
UART RXGPIO16General GPIO
Analogue sensorGPIO4ADC1_CH3, no strap warning
Wake inputGPIO9LP GPIO, non-strap
Status LEDGPIO12Simple general GPIO
USBGPIO17/18Reserve for D−/D+

These are not mandatory pin assignments. They simply illustrate a clean starting point that avoids the documented strap and USB conflicts.

Hardware Design: Keep USB D+/D− Short and Paired

For a custom PCB using the module’s native USB:

  • Route GPIO17/GPIO18 as a USB differential pair.
  • Keep the pair short.
  • Avoid unnecessary vias and stubs.
  • Keep noisy switching nodes away from the pair.
  • Add ESD protection appropriate to the external USB connector.
  • Remember that USB VBUS is not the same thing as directly powering logic I/O with 5 V.

For a first prototype, Espressif’s H21 DevKitM-1 is easier than immediately designing a custom USB layout.

Hardware Design: Antenna Placement

ESP32-H21-MINI-1 uses an onboard PCB antenna, so the carrier PCB and enclosure become part of the RF design.

Espressif’s module-placement guidance for its compact H-series modules recommends placing the antenna end at the edge of the base board, ideally allowing the antenna region to extend beyond the carrier PCB.

If the antenna cannot overhang:

  • Keep it as close to the PCB edge as possible.
  • Remove carrier-board material/copper below and beside the antenna according to the official land-pattern guidance.
  • Do not place the module antenna in the centre of a large ground-filled PCB.
  • Keep batteries, metal shields and cables away from the antenna.
  • Validate range in the final enclosure.

Espressif’s current module guidance recommends at least roughly 15 mm enclosure clearance around PCB antennas where possible. Treat the final H21 land pattern/datasheet as authoritative when it becomes available in the normal module-document set.

Hardware Design: Power and Enable

A bare MINI-1 module is not a USB development board. Your carrier must provide the module’s regulated supply, decoupling and enable/reset network.

For production hardware:

  • Use the supply voltage and decoupling values from the final H21-MINI-1 datasheet/reference design.
  • Place bulk and high-frequency decoupling close to the module supply pins.
  • Give the regulator enough transient current margin for radio activity.
  • Do not power the module from a weak USB-UART adapter’s 3.3 V pin.
  • Expose reset/enable and a recovery strap on development hardware.

The integrated DC-DC inside H21 reduces SoC power consumption; it does not remove the need for a well-designed external supply to the module.

ESP-IDF Support in 2026

H21 support has been moving quickly during 2026.

Espressif’s support-status page dated 20 May 2026 said the latest preview support was in the ESP-IDF master branch and advised developers to build from HEAD until a full release arrived.

Current ESP-IDF 6.1 documentation now contains H21-specific GPIO, USB Serial/JTAG and debugging pages, showing that support has moved substantially forward. However, some H21 getting-started pages still carry auto-generated “not updated for ESP32-H21 yet” warnings.

For an experimental board this is fine. For a commercial design, pin your ESP-IDF version and validate the exact Thread/Zigbee/BLE features you need before hardware release.

Flashing with Native USB

With GPIO17/18 connected to a USB connector, H21 can be flashed directly without a USB-UART bridge.

idf.py set-target esp32h21
idf.py build
idf.py -p PORT flash monitor

The USB Serial/JTAG device normally appears as a COM port on Windows, /dev/ttyACM* on Linux or /dev/cu* on macOS.

If the board is manually forced into download mode, current esptool documentation notes that USB Serial/JTAG may not always perform the full strap-resampling reset needed to leave download mode automatically. Pressing reset or power-cycling after a successful flash is a simple fallback.

ESPHome Support

Current ESPHome development documentation already lists ESP32-H21 as a target requiring ESP-IDF 6.1 or later.

It identifies:

CPU: 96 MHz single-core RISC-V
Wi-Fi: none
Bluetooth: BLE
802.15.4: Thread/Zigbee
USB: Serial/JTAG only
GPIO: 26 chip-level pins
ADC: 5 channels
UART: 2
I2C: 2

Because H21 has no Wi-Fi, a conventional standalone Wi-Fi ESPHome node is not its natural use case. H21 becomes more interesting where ESPHome’s evolving BLE/Thread/Zigbee support can use another network path or where the chip is paired with a connected host.

H21 vs H2 vs C6: Which Architecture?

RequirementBetter direction
Wi-Fi + BLE + Thread/Zigbee in one MCUESP32-C6
Low-power BLE + Thread/Zigbee without Wi-FiESP32-H21 / H2 family
Tiny integrated module with 4 MB flashESP32-H21-MINI-1
Simple Wi-Fi Home Assistant sensorNot H21; use C3/C6/S3
Thread/Zigbee radio paired with Wi-Fi hostH21 is a strong fit
USB OTG device applicationNot H21

Common Design Mistakes

MistakeWhy it matters
Assuming H21 has Wi-Fi because it says ESP32H21 is BLE + 802.15.4 only
Using GPIO19–25 as normal I/OThey are SPI flash interface pins
Using GPIO17/18 for peripherals then expecting USBThose pins are USB D−/D+
Putting strong pulls on GPIO8/13/14They are strapping pins
Routing antenna over carrier ground planeCan destroy 2.4 GHz range
Assuming USB OTG existsH21 provides Serial/JTAG, not general USB OTG
Using an old ESP-IDF releaseH21 support is new and version-sensitive
Copying H2/C6 pin numbersPeripheral capabilities and restricted pins differ
Freezing a production PCB from preview documentationH21 documentation/support is still maturing

Recommended Design Checklist

  • Confirm ESP32-H21-MINI-1 is the correct architecture: no Wi-Fi is required.
  • Treat GPIO0–18 as the practical application pin set and keep GPIO19–25 away from external peripherals.
  • Reserve GPIO17/18 if native USB flashing/debug is required.
  • Avoid strong reset-time loading on GPIO8, GPIO13 and GPIO14.
  • Use GPIO1–5 for ADC inputs.
  • Use GPIO5–11 when low-power GPIO capability is useful.
  • Put the module antenna at the edge of the carrier PCB.
  • Keep the antenna clearance free from copper, metal and enclosure obstructions.
  • Prototype first on ESP32-H21-DevKitM-1.
  • Verify the final Espressif MINI-1 datasheet/land pattern before PCB release.

Final Recommendation

ESP32-H21-MINI-1 is a specialised module rather than a universal ESP32 board. Its strength is a compact, low-power BLE + Thread/Zigbee radio/MCU platform with 4 MB flash and enough GPIO for sensors and actuators without paying the power and complexity cost of Wi-Fi.

The pin strategy is straightforward once the restricted groups are separated:

GPIO0–18 → application-accessible range
GPIO1–5  → ADC
GPIO5–11 → low-power GPIO
GPIO8/13/14 → strapping
GPIO17/18 → USB Serial/JTAG
GPIO19–25 → flash interface

For a Thread/Zigbee sensor or radio-coprocessor product, H21-MINI-1 is worth watching closely. For a normal Wi-Fi ESPHome node, choose C3, C6 or S3 instead.

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